California Government Contractors > LIBRARY TECHNOLOGIES INC

LIBRARY TECHNOLOGIES INCSaratoga, California

LIBRARY TECHNOLOGIES INC
(408) 647-6025
19959 Lanark Ln Saratoga, CA 95070-5023
Fax:408-867-2753

Products & Services

asic,automatic characterization,block characterization,cadence,cell characterization,cell library characterization,circuit delay optimization,circuit modeling,circuit optimization,circuit power optimization,circuit simulation,critical path optimization,clock skew,clock tree,clock tree synthesis,clock network,clock latency,clock grid,cool chips,deep sub-micron,delay calculation,design automation,design reuse,device sizing,eda,ground bounce,intellectual property,interconnect,ir drop,ip characterization,ip modeling,extraction,layout synthesis,libchar,library development,library generator,library technologies,liberty format,liberty library,memory characterization,memory modeling,monte carlo analysis,statistical static timing analysis,static timing analysis,statistical variation,transistor-level statistical variation,process variation,yield optimization,ssta,sta,ccs,ecsm,ccs-power,libtech,low power,high speed,ovi,posynomial,power characterization,power modeling,power optimization,power simulation,constant delay,replacement delay,powerarc,powergate,rc extraction,rc reduction,setup and hold,skew measurement,soc,spice simulation,sub-micron design,substrate noise,synopsys library,synopsys view,synopsys,synthesis library,system on a chip,timing characterization,timing closure,timing model,transistor sizing,short-circuit power,verilog library,verilog model,verilog view,verilog,vhdl view,vhdl,vital library,vital model,vital view,vital
cell, io and memory characterization, modeling, circuit optimization, power simulation, process variation analysis, timing closure tools

NAICS Code(s)

541512
Computer Systems Design Services

Found any discrepancies in your company profile?

Request to update/remove the information